tdelay.c, tdelay.h
tdelay.c, tdelay.h
1. Introduction/Overview
2. Top Level Files
3. Data
4. Parametric Cables
4.1. Input (trigger) signal
4.2. Feedback
4.3. Delay
4.4. Master Clock
5. Trigger Loops and Banks
5.1. Defining a Loop (data)
5.1.1. Struct Declaration
5.1.2. Init
5.1.3. Components
5.1.3.1. State
5.1.3.2. Energy
5.1.3.3. Block Position
5.1.3.4. Counter
5.2. Trigger Loop
5.3. Updating The Loop Bank
5.4. Updating Loop State
6. Nodes
6.1. Mother Node
6.2. Loop Node